Features for the SN54LS174
‘174, ‘LS174, ‘S174 Contain Six Flip-Flops with Single-Rail Outputs
Buffered Clock and Direct Clear Inputs
Individual Data Input to Each Flip-Flop
Applications include:
Buffer/Storage Registers
Shift Registers
Pattern Generators

Description for the SN54LS174
These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. All have a direct clear input, and the ‘175, ‘LS175, and ‘S175 feature complementary outputs from each flip-flop.

Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output.

These circuits are fully compatible for use with most TTL circuits.

Number of channels 6
Technology family LS
Supply voltage (min) (V) 4.5
Supply voltage (max) (V) 5.5
Input type Bipolar
Output type Push-Pull
Clock frequency (max) (MHz) 35
IOL (max) (mA) 8
IOH (max) (mA) -0.4
Supply current (max) (µA) 26000
Features High speed (tpd 10-50ns)
Operating temperature range (°C) -55 to 125
Rating Military